Hi! I am a Ph.D. candidate at Seoul National University since 2023. I am currently advised by Prof. Jung Ho Ahn and a member of the SCALable Computer Architecture Laboratory (SCALE Lab).
Overall my research primarily focuses on memory system reliability, security, and performance. My recent work involves analyzing the DeepSeek LLM to propose future architectural directions. I’m also working on optimizing a memory system, including memory controller and HBM, for LLM.
My research on DRAM microarchitecture includes efforts to reverse-engineer internal structures and operations. I also work on reliability, such as analyzing DRAM error characteristics, and security, with a particular focus on RowHammer attacks.
I have hands-on experience with CPU, GPU, and memory system simulators, including gem5, Accel-Sim, and Ramulator. I have experience modifying the Linux kernel, specifically working with Error Detection and Correction (EDAC) kernel modules. I am also familiar with Hardware Description Languages (HDL) like Verilog and have utilized Vivado, Xcelium RTL simulator, and Design Compiler for area and power evaluation.
For more details, please refer to my CV.
Education
Seoul National University
Ph.D. in Intelligence & Information Convergence, March 2023 - Present
Advisor: Prof. Jung Ho Ahn
Korea University
B.S. in Electrical & Electronic Engineering, March 2017 - February 2023
Research Experience
Graduate research assistant @ Scalable Computer Architecture Laboratory, Seoul National University
Mar. 2023 - Present
Undergraduate research assistant @ Scalable Computer Architecture Laboratory, Seoul National University
Jun. 2022 - Aug. 2022
- Designing RowHammer generator verilog module in DDR3 SoftMC
- RowHammer error characteristics analysis on HBM2
Undergraduate research assistant @ Compiler & Microarchitecture Laboratory, Korea University
Sep. 2021 - Jun. 2022
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PointPillars model performance analysis on TI-SOC and CPU-GPU platforms (Korean) Link
Publication
IEEE S&P ‘26
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"SoK: Systematizing a Decade of Architectural RowHammer Defenses Through the Lens of Streaming Algorithms"
Michael Jaemin Kim, Seungmin Baek, Jumin Kim, Hwayong Nam, Nam Sung Kim, Jung Ho Ahn.
arXiv ‘25
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"The New LLM Bottleneck: A Systems Perspective on Latent Attention and Mixture-of-Experts"
Sungmin Yun, Seonyong Park, Hwayong Nam, Younjoo Lee, Gunjun Lee, Kwanhee Kyung, Sangpyo Kim, Nam Sung Kim, Jongmin Kim, Hyungyo Kim, Juhwan Cho, Seungmin Baek, Jung Ho Ahn.
IEEE CAL ‘25
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"Per-Row Activation Counting on Real Hardware: Demystifying Performance Overheads"
Jumin Kim, Seungmin Baek, Minbok Wi, Hwayong Nam, Michael Jaemin Kim, Sukhan Lee, Kyomin Sohn, Jung Ho Ahn
DRAMSec ‘25
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"Sudoku: Decomposing DRAM Address Mapping into Component Functions"
Minbok Wi, Seungmin Baek, Seonyong Park, Mattan Erez, and Jung Ho Ahn
ASPLOS ‘25
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"Marionette: RowHammer Attack via Row Coupling"
Seungmin Baek, Minbok Wi, Seonyong Park, Hwayong Nam, Michael Jaemin Kim, Nam Sung Kim, and Jung Ho Ahn
ISCA ‘24
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"DRAMScope: Uncovering DRAM Microarchitecture and Characteristics by Issuing Memory Commands"
Hwayong Nam, Seungmin Baek, Minbok Wi, Michael Jaemin Kim, Jaehyun Park, Chihun Song, Nam Sung Kim, and Jung Ho Ahn
IEEE CAL ‘23
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"X-ray: Discovering DRAM Internal Structure and Error Characteristics by Issuing Memory Commands"
Hwayong Nam, Seungmin Baek, Minbok Wi, Michael Jaemin Kim, Jaehyun Park, Chihun Song, Nam Sung Kim, and Jung Ho Ahn
Award
- June 2022: LG Electronics Paper Award, Summer Annual Conference of IEIE 2022, Korea
Recognition
- Sep. 2023 - Feb. 2024: [BK21] Exellent Research Talent Fellowship
Skill
- Programming: Python, C/C++, Verilog
- Tools: VTune (Intel), Vivado (Xilinx), Xcelium (Cadence), Design Compiler (Synopsys)